Created
February 21, 2021 10:50
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| --- bcm2711-rpi-4-b.dtb.txt 2021-02-21 11:37:45.000000000 +0100 | |
| +++ bcm2711-rpi-4-b.dtb.1.txt 2021-02-21 11:37:51.000000000 +0100 | |
| @@ -14,6 +14,7 @@ | |
| emmc2bus = "/emmc2bus"; | |
| ethernet0 = "/scb/ethernet@7d580000"; | |
| pcie0 = "/scb/pcie@7d500000"; | |
| + blconfig = "/reserved-memory/nvram@0"; | |
| audio = "/soc/mailbox@7e00b840/bcm2835_audio"; | |
| aux = "/soc/aux@7e215000"; | |
| sound = "/soc/sound"; | |
| @@ -56,7 +57,7 @@ | |
| #address-cells = <0x02>; | |
| #size-cells = <0x01>; | |
| ranges; | |
| - phandle = <0x3e>; | |
| + phandle = <0x41>; | |
| linux,cma { | |
| compatible = "shared-dma-pool"; | |
| @@ -64,7 +65,17 @@ | |
| reusable; | |
| linux,cma-default; | |
| alloc-ranges = <0x00 0x00 0x30000000>; | |
| - phandle = <0x3f>; | |
| + phandle = <0x42>; | |
| + }; | |
| + | |
| + nvram@0 { | |
| + compatible = "raspberrypi,bootloader-config\0nvmem-rmem"; | |
| + #address-cells = <0x01>; | |
| + #size-cells = <0x01>; | |
| + reg = <0x00 0x00 0x00>; | |
| + no-map; | |
| + status = "disabled"; | |
| + phandle = <0x43>; | |
| }; | |
| }; | |
| @@ -75,7 +86,7 @@ | |
| polling-delay = <0x3e8>; | |
| coefficients = <0xfffffe19 0x641b8>; | |
| thermal-sensors = <0x02>; | |
| - phandle = <0x40>; | |
| + phandle = <0x44>; | |
| cooling-maps { | |
| }; | |
| @@ -88,14 +99,14 @@ | |
| #size-cells = <0x01>; | |
| ranges = <0x7e000000 0x00 0xfe000000 0x1800000 0x7c000000 0x00 0xfc000000 0x2000000 0x40000000 0x00 0xff800000 0x800000>; | |
| dma-ranges = <0xc0000000 0x00 0x00 0x40000000>; | |
| - phandle = <0x41>; | |
| + phandle = <0x45>; | |
| timer@7e003000 { | |
| compatible = "brcm,bcm2835-system-timer"; | |
| reg = <0x7e003000 0x1000>; | |
| interrupts = <0x00 0x40 0x04 0x00 0x41 0x04 0x00 0x42 0x04 0x00 0x43 0x04>; | |
| clock-frequency = <0xf4240>; | |
| - phandle = <0x42>; | |
| + phandle = <0x46>; | |
| }; | |
| txp@7e004000 { | |
| @@ -103,7 +114,7 @@ | |
| reg = <0x7e004000 0x20>; | |
| interrupts = <0x00 0x4b 0x04>; | |
| status = "disabled"; | |
| - phandle = <0x43>; | |
| + phandle = <0x47>; | |
| }; | |
| cprman@7e101000 { | |
| @@ -115,20 +126,12 @@ | |
| phandle = <0x07>; | |
| }; | |
| - rng@7e104000 { | |
| - compatible = "brcm,bcm2711-rng200"; | |
| - reg = <0x7e104000 0x10>; | |
| - interrupts = <0x00 0x7d 0x04>; | |
| - status = "okay"; | |
| - phandle = <0x35>; | |
| - }; | |
| - | |
| mailbox@7e00b880 { | |
| compatible = "brcm,bcm2835-mbox"; | |
| reg = <0x7e00b880 0x40>; | |
| interrupts = <0x00 0x21 0x04>; | |
| #mbox-cells = <0x00>; | |
| - phandle = <0x1c>; | |
| + phandle = <0x22>; | |
| }; | |
| gpio@7e200000 { | |
| @@ -146,63 +149,63 @@ | |
| dpi_gpio0 { | |
| brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b>; | |
| brcm,function = <0x06>; | |
| - phandle = <0x44>; | |
| + phandle = <0x48>; | |
| }; | |
| emmc_gpio22 { | |
| brcm,pins = <0x16 0x17 0x18 0x19 0x1a 0x1b>; | |
| brcm,function = <0x07>; | |
| - phandle = <0x45>; | |
| + phandle = <0x49>; | |
| }; | |
| emmc_gpio34 { | |
| brcm,pins = <0x22 0x23 0x24 0x25 0x26 0x27>; | |
| brcm,function = <0x07>; | |
| brcm,pull = <0x00 0x02 0x02 0x02 0x02 0x02>; | |
| - phandle = <0x46>; | |
| + phandle = <0x4a>; | |
| }; | |
| emmc_gpio48 { | |
| brcm,pins = <0x30 0x31 0x32 0x33 0x34 0x35>; | |
| brcm,function = <0x07>; | |
| - phandle = <0x1e>; | |
| + phandle = <0x24>; | |
| }; | |
| gpclk0_gpio4 { | |
| brcm,pins = <0x04>; | |
| brcm,function = <0x04>; | |
| - phandle = <0x47>; | |
| + phandle = <0x4b>; | |
| }; | |
| gpclk1_gpio5 { | |
| brcm,pins = <0x05>; | |
| brcm,function = <0x04>; | |
| - phandle = <0x48>; | |
| + phandle = <0x4c>; | |
| }; | |
| gpclk1_gpio42 { | |
| brcm,pins = <0x2a>; | |
| brcm,function = <0x04>; | |
| - phandle = <0x49>; | |
| + phandle = <0x4d>; | |
| }; | |
| gpclk1_gpio44 { | |
| brcm,pins = <0x2c>; | |
| brcm,function = <0x04>; | |
| - phandle = <0x4a>; | |
| + phandle = <0x4e>; | |
| }; | |
| gpclk2_gpio6 { | |
| brcm,pins = <0x06>; | |
| brcm,function = <0x04>; | |
| - phandle = <0x4b>; | |
| + phandle = <0x4f>; | |
| }; | |
| gpclk2_gpio43 { | |
| brcm,pins = <0x2b>; | |
| brcm,function = <0x04>; | |
| brcm,pull = <0x00>; | |
| - phandle = <0x4c>; | |
| + phandle = <0x50>; | |
| }; | |
| i2c0_gpio0 { | |
| @@ -214,7 +217,7 @@ | |
| i2c0_gpio28 { | |
| brcm,pins = <0x1c 0x1d>; | |
| brcm,function = <0x04>; | |
| - phandle = <0x4d>; | |
| + phandle = <0x51>; | |
| }; | |
| i2c0_gpio44 { | |
| @@ -226,139 +229,139 @@ | |
| i2c1_gpio2 { | |
| brcm,pins = <0x02 0x03>; | |
| brcm,function = <0x04>; | |
| - phandle = <0x4e>; | |
| + phandle = <0x52>; | |
| }; | |
| i2c1_gpio44 { | |
| brcm,pins = <0x2c 0x2d>; | |
| brcm,function = <0x06>; | |
| - phandle = <0x4f>; | |
| + phandle = <0x53>; | |
| }; | |
| jtag_gpio22 { | |
| brcm,pins = <0x16 0x17 0x18 0x19 0x1a 0x1b>; | |
| brcm,function = <0x03>; | |
| - phandle = <0x50>; | |
| + phandle = <0x54>; | |
| }; | |
| pcm_gpio18 { | |
| brcm,pins = <0x12 0x13 0x14 0x15>; | |
| brcm,function = <0x04>; | |
| - phandle = <0x51>; | |
| + phandle = <0x55>; | |
| }; | |
| pcm_gpio28 { | |
| brcm,pins = <0x1c 0x1d 0x1e 0x1f>; | |
| brcm,function = <0x06>; | |
| - phandle = <0x52>; | |
| + phandle = <0x56>; | |
| }; | |
| sdhost_gpio48 { | |
| brcm,pins = <0x30 0x31 0x32 0x33 0x34 0x35>; | |
| brcm,function = <0x04>; | |
| - phandle = <0x53>; | |
| + phandle = <0x57>; | |
| }; | |
| spi0_gpio7 { | |
| brcm,pins = <0x07 0x08 0x09 0x0a 0x0b>; | |
| brcm,function = <0x04>; | |
| - phandle = <0x54>; | |
| + phandle = <0x58>; | |
| }; | |
| spi0_gpio35 { | |
| brcm,pins = <0x23 0x24 0x25 0x26 0x27>; | |
| brcm,function = <0x04>; | |
| - phandle = <0x55>; | |
| + phandle = <0x59>; | |
| }; | |
| spi1_gpio16 { | |
| brcm,pins = <0x10 0x11 0x12 0x13 0x14 0x15>; | |
| brcm,function = <0x03>; | |
| - phandle = <0x56>; | |
| + phandle = <0x5a>; | |
| }; | |
| spi2_gpio40 { | |
| brcm,pins = <0x28 0x29 0x2a 0x2b 0x2c 0x2d>; | |
| brcm,function = <0x03>; | |
| - phandle = <0x57>; | |
| + phandle = <0x5b>; | |
| }; | |
| uart0_gpio14 { | |
| brcm,pins = <0x0e 0x0f>; | |
| brcm,function = <0x04>; | |
| - phandle = <0x58>; | |
| + phandle = <0x5c>; | |
| }; | |
| uart0_ctsrts_gpio16 { | |
| brcm,pins = <0x10 0x11>; | |
| brcm,function = <0x07>; | |
| - phandle = <0x59>; | |
| + phandle = <0x5d>; | |
| }; | |
| uart0_ctsrts_gpio30 { | |
| brcm,pins = <0x1e 0x1f>; | |
| brcm,function = <0x07>; | |
| brcm,pull = <0x02 0x00>; | |
| - phandle = <0x5a>; | |
| + phandle = <0x5e>; | |
| }; | |
| uart0_gpio32 { | |
| brcm,pins = <0x20 0x21>; | |
| brcm,function = <0x07>; | |
| brcm,pull = <0x00 0x02>; | |
| - phandle = <0x5b>; | |
| + phandle = <0x5f>; | |
| }; | |
| uart0_gpio36 { | |
| brcm,pins = <0x24 0x25>; | |
| brcm,function = <0x06>; | |
| - phandle = <0x5c>; | |
| + phandle = <0x60>; | |
| }; | |
| uart0_ctsrts_gpio38 { | |
| brcm,pins = <0x26 0x27>; | |
| brcm,function = <0x06>; | |
| - phandle = <0x5d>; | |
| + phandle = <0x61>; | |
| }; | |
| uart1_gpio14 { | |
| brcm,pins = <0x0e 0x0f>; | |
| brcm,function = <0x02>; | |
| - phandle = <0x5e>; | |
| + phandle = <0x62>; | |
| }; | |
| uart1_ctsrts_gpio16 { | |
| brcm,pins = <0x10 0x11>; | |
| brcm,function = <0x02>; | |
| - phandle = <0x5f>; | |
| + phandle = <0x63>; | |
| }; | |
| uart1_gpio32 { | |
| brcm,pins = <0x20 0x21>; | |
| brcm,function = <0x02>; | |
| - phandle = <0x60>; | |
| + phandle = <0x64>; | |
| }; | |
| uart1_ctsrts_gpio30 { | |
| brcm,pins = <0x1e 0x1f>; | |
| brcm,function = <0x02>; | |
| - phandle = <0x61>; | |
| + phandle = <0x65>; | |
| }; | |
| uart1_gpio40 { | |
| brcm,pins = <0x28 0x29>; | |
| brcm,function = <0x02>; | |
| - phandle = <0x62>; | |
| + phandle = <0x66>; | |
| }; | |
| uart1_ctsrts_gpio42 { | |
| brcm,pins = <0x2a 0x2b>; | |
| brcm,function = <0x02>; | |
| - phandle = <0x63>; | |
| + phandle = <0x67>; | |
| }; | |
| gpclk0_gpio49 { | |
| - phandle = <0x64>; | |
| + phandle = <0x68>; | |
| pin-gpclk { | |
| pins = "gpio49"; | |
| @@ -368,7 +371,7 @@ | |
| }; | |
| gpclk1_gpio50 { | |
| - phandle = <0x65>; | |
| + phandle = <0x69>; | |
| pin-gpclk { | |
| pins = "gpio50"; | |
| @@ -378,7 +381,7 @@ | |
| }; | |
| gpclk2_gpio51 { | |
| - phandle = <0x66>; | |
| + phandle = <0x6a>; | |
| pin-gpclk { | |
| pins = "gpio51"; | |
| @@ -388,7 +391,7 @@ | |
| }; | |
| i2c0_gpio46 { | |
| - phandle = <0x67>; | |
| + phandle = <0x6b>; | |
| pin-sda { | |
| function = "alt0"; | |
| @@ -404,7 +407,7 @@ | |
| }; | |
| i2c1_gpio46 { | |
| - phandle = <0x68>; | |
| + phandle = <0x6c>; | |
| pin-sda { | |
| function = "alt1"; | |
| @@ -420,7 +423,7 @@ | |
| }; | |
| i2c3_gpio2 { | |
| - phandle = <0x69>; | |
| + phandle = <0x6d>; | |
| pin-sda { | |
| function = "alt5"; | |
| @@ -436,7 +439,7 @@ | |
| }; | |
| i2c3_gpio4 { | |
| - phandle = <0x6a>; | |
| + phandle = <0x6e>; | |
| pin-sda { | |
| function = "alt5"; | |
| @@ -452,7 +455,7 @@ | |
| }; | |
| i2c4_gpio6 { | |
| - phandle = <0x6b>; | |
| + phandle = <0x6f>; | |
| pin-sda { | |
| function = "alt5"; | |
| @@ -468,7 +471,7 @@ | |
| }; | |
| i2c4_gpio8 { | |
| - phandle = <0x6c>; | |
| + phandle = <0x70>; | |
| pin-sda { | |
| function = "alt5"; | |
| @@ -484,7 +487,7 @@ | |
| }; | |
| i2c5_gpio10 { | |
| - phandle = <0x6d>; | |
| + phandle = <0x71>; | |
| pin-sda { | |
| function = "alt5"; | |
| @@ -500,7 +503,7 @@ | |
| }; | |
| i2c5_gpio12 { | |
| - phandle = <0x6e>; | |
| + phandle = <0x72>; | |
| pin-sda { | |
| function = "alt5"; | |
| @@ -516,7 +519,7 @@ | |
| }; | |
| i2c6_gpio0 { | |
| - phandle = <0x6f>; | |
| + phandle = <0x73>; | |
| pin-sda { | |
| function = "alt5"; | |
| @@ -532,7 +535,7 @@ | |
| }; | |
| i2c6_gpio22 { | |
| - phandle = <0x70>; | |
| + phandle = <0x74>; | |
| pin-sda { | |
| function = "alt5"; | |
| @@ -548,7 +551,7 @@ | |
| }; | |
| i2c_slave_gpio8 { | |
| - phandle = <0x71>; | |
| + phandle = <0x75>; | |
| pins-i2c-slave { | |
| pins = "gpio8\0gpio9\0gpio10\0gpio11"; | |
| @@ -557,7 +560,7 @@ | |
| }; | |
| jtag_gpio48 { | |
| - phandle = <0x72>; | |
| + phandle = <0x76>; | |
| pins-jtag { | |
| pins = "gpio48\0gpio49\0gpio50\0gpio51\0gpio52\0gpio53"; | |
| @@ -566,7 +569,7 @@ | |
| }; | |
| mii_gpio28 { | |
| - phandle = <0x73>; | |
| + phandle = <0x77>; | |
| pins-mii { | |
| pins = "gpio28\0gpio29\0gpio30\0gpio31"; | |
| @@ -575,7 +578,7 @@ | |
| }; | |
| mii_gpio36 { | |
| - phandle = <0x74>; | |
| + phandle = <0x78>; | |
| pins-mii { | |
| pins = "gpio36\0gpio37\0gpio38\0gpio39"; | |
| @@ -584,7 +587,7 @@ | |
| }; | |
| pcm_gpio50 { | |
| - phandle = <0x75>; | |
| + phandle = <0x79>; | |
| pins-pcm { | |
| pins = "gpio50\0gpio51\0gpio52\0gpio53"; | |
| @@ -593,7 +596,7 @@ | |
| }; | |
| pwm0_0_gpio12 { | |
| - phandle = <0x76>; | |
| + phandle = <0x7a>; | |
| pin-pwm { | |
| pins = "gpio12"; | |
| @@ -603,7 +606,7 @@ | |
| }; | |
| pwm0_0_gpio18 { | |
| - phandle = <0x77>; | |
| + phandle = <0x7b>; | |
| pin-pwm { | |
| pins = "gpio18"; | |
| @@ -623,7 +626,7 @@ | |
| }; | |
| pwm0_1_gpio13 { | |
| - phandle = <0x78>; | |
| + phandle = <0x7c>; | |
| pin-pwm { | |
| pins = "gpio13"; | |
| @@ -633,7 +636,7 @@ | |
| }; | |
| pwm0_1_gpio19 { | |
| - phandle = <0x79>; | |
| + phandle = <0x7d>; | |
| pin-pwm { | |
| pins = "gpio19"; | |
| @@ -653,7 +656,7 @@ | |
| }; | |
| pwm0_1_gpio45 { | |
| - phandle = <0x7a>; | |
| + phandle = <0x7e>; | |
| pin-pwm { | |
| pins = "gpio45"; | |
| @@ -663,7 +666,7 @@ | |
| }; | |
| pwm0_0_gpio52 { | |
| - phandle = <0x7b>; | |
| + phandle = <0x7f>; | |
| pin-pwm { | |
| pins = "gpio52"; | |
| @@ -673,7 +676,7 @@ | |
| }; | |
| pwm0_1_gpio53 { | |
| - phandle = <0x7c>; | |
| + phandle = <0x80>; | |
| pin-pwm { | |
| pins = "gpio53"; | |
| @@ -683,7 +686,7 @@ | |
| }; | |
| rgmii_gpio35 { | |
| - phandle = <0x7d>; | |
| + phandle = <0x81>; | |
| pin-start-stop { | |
| pins = "gpio35"; | |
| @@ -697,7 +700,7 @@ | |
| }; | |
| rgmii_irq_gpio34 { | |
| - phandle = <0x7e>; | |
| + phandle = <0x82>; | |
| pin-irq { | |
| pins = "gpio34"; | |
| @@ -706,7 +709,7 @@ | |
| }; | |
| rgmii_irq_gpio39 { | |
| - phandle = <0x7f>; | |
| + phandle = <0x83>; | |
| pin-irq { | |
| pins = "gpio39"; | |
| @@ -715,7 +718,7 @@ | |
| }; | |
| rgmii_mdio_gpio28 { | |
| - phandle = <0x80>; | |
| + phandle = <0x84>; | |
| pins-mdio { | |
| pins = "gpio28\0gpio29"; | |
| @@ -724,7 +727,7 @@ | |
| }; | |
| rgmii_mdio_gpio37 { | |
| - phandle = <0x81>; | |
| + phandle = <0x85>; | |
| pins-mdio { | |
| pins = "gpio37\0gpio38"; | |
| @@ -733,7 +736,7 @@ | |
| }; | |
| spi0_gpio46 { | |
| - phandle = <0x82>; | |
| + phandle = <0x86>; | |
| pins-spi { | |
| pins = "gpio46\0gpio47\0gpio48\0gpio49"; | |
| @@ -742,7 +745,7 @@ | |
| }; | |
| spi2_gpio46 { | |
| - phandle = <0x83>; | |
| + phandle = <0x87>; | |
| pins-spi { | |
| pins = "gpio46\0gpio47\0gpio48\0gpio49\0gpio50"; | |
| @@ -751,7 +754,7 @@ | |
| }; | |
| spi3_gpio0 { | |
| - phandle = <0x84>; | |
| + phandle = <0x88>; | |
| pins-spi { | |
| pins = "gpio0\0gpio1\0gpio2\0gpio3"; | |
| @@ -760,7 +763,7 @@ | |
| }; | |
| spi4_gpio4 { | |
| - phandle = <0x85>; | |
| + phandle = <0x89>; | |
| pins-spi { | |
| pins = "gpio4\0gpio5\0gpio6\0gpio7"; | |
| @@ -769,7 +772,7 @@ | |
| }; | |
| spi5_gpio12 { | |
| - phandle = <0x86>; | |
| + phandle = <0x8a>; | |
| pins-spi { | |
| pins = "gpio12\0gpio13\0gpio14\0gpio15"; | |
| @@ -778,7 +781,7 @@ | |
| }; | |
| spi6_gpio18 { | |
| - phandle = <0x87>; | |
| + phandle = <0x8b>; | |
| pins-spi { | |
| pins = "gpio18\0gpio19\0gpio20\0gpio21"; | |
| @@ -787,7 +790,7 @@ | |
| }; | |
| uart2_gpio0 { | |
| - phandle = <0x88>; | |
| + phandle = <0x8c>; | |
| pin-tx { | |
| pins = "gpio0"; | |
| @@ -803,7 +806,7 @@ | |
| }; | |
| uart2_ctsrts_gpio2 { | |
| - phandle = <0x89>; | |
| + phandle = <0x8d>; | |
| pin-cts { | |
| pins = "gpio2"; | |
| @@ -819,7 +822,7 @@ | |
| }; | |
| uart3_gpio4 { | |
| - phandle = <0x8a>; | |
| + phandle = <0x8e>; | |
| pin-tx { | |
| pins = "gpio4"; | |
| @@ -835,7 +838,7 @@ | |
| }; | |
| uart3_ctsrts_gpio6 { | |
| - phandle = <0x8b>; | |
| + phandle = <0x8f>; | |
| pin-cts { | |
| pins = "gpio6"; | |
| @@ -851,7 +854,7 @@ | |
| }; | |
| uart4_gpio8 { | |
| - phandle = <0x8c>; | |
| + phandle = <0x90>; | |
| pin-tx { | |
| pins = "gpio8"; | |
| @@ -867,7 +870,7 @@ | |
| }; | |
| uart4_ctsrts_gpio10 { | |
| - phandle = <0x8d>; | |
| + phandle = <0x91>; | |
| pin-cts { | |
| pins = "gpio10"; | |
| @@ -883,7 +886,7 @@ | |
| }; | |
| uart5_gpio12 { | |
| - phandle = <0x8e>; | |
| + phandle = <0x92>; | |
| pin-tx { | |
| pins = "gpio12"; | |
| @@ -899,7 +902,7 @@ | |
| }; | |
| uart5_ctsrts_gpio14 { | |
| - phandle = <0x8f>; | |
| + phandle = <0x93>; | |
| pin-cts { | |
| pins = "gpio14"; | |
| @@ -917,19 +920,19 @@ | |
| gpioout { | |
| brcm,pins = <0x06>; | |
| brcm,function = <0x01>; | |
| - phandle = <0x90>; | |
| + phandle = <0x94>; | |
| }; | |
| alt0 { | |
| brcm,pins = <0x04 0x05 0x07 0x08 0x09 0x0a 0x0b>; | |
| brcm,function = <0x04>; | |
| - phandle = <0x91>; | |
| + phandle = <0x95>; | |
| }; | |
| dpi_18bit_gpio0 { | |
| brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15>; | |
| brcm,function = <0x06>; | |
| - phandle = <0x92>; | |
| + phandle = <0x96>; | |
| }; | |
| spi0_pins { | |
| @@ -947,56 +950,56 @@ | |
| spi3_pins { | |
| brcm,pins = <0x01 0x02 0x03>; | |
| brcm,function = <0x07>; | |
| - phandle = <0x93>; | |
| + phandle = <0x97>; | |
| }; | |
| spi3_cs_pins { | |
| brcm,pins = <0x00 0x18>; | |
| brcm,function = <0x01>; | |
| - phandle = <0x94>; | |
| + phandle = <0x98>; | |
| }; | |
| spi4_pins { | |
| brcm,pins = <0x05 0x06 0x07>; | |
| brcm,function = <0x07>; | |
| - phandle = <0x95>; | |
| + phandle = <0x99>; | |
| }; | |
| spi4_cs_pins { | |
| brcm,pins = <0x04 0x19>; | |
| brcm,function = <0x01>; | |
| - phandle = <0x96>; | |
| + phandle = <0x9a>; | |
| }; | |
| spi5_pins { | |
| brcm,pins = <0x0d 0x0e 0x0f>; | |
| brcm,function = <0x07>; | |
| - phandle = <0x97>; | |
| + phandle = <0x9b>; | |
| }; | |
| spi5_cs_pins { | |
| brcm,pins = <0x0c 0x1a>; | |
| brcm,function = <0x01>; | |
| - phandle = <0x98>; | |
| + phandle = <0x9c>; | |
| }; | |
| spi6_pins { | |
| brcm,pins = <0x13 0x14 0x15>; | |
| brcm,function = <0x07>; | |
| - phandle = <0x99>; | |
| + phandle = <0x9d>; | |
| }; | |
| spi6_cs_pins { | |
| brcm,pins = <0x12 0x1b>; | |
| brcm,function = <0x01>; | |
| - phandle = <0x9a>; | |
| + phandle = <0x9e>; | |
| }; | |
| i2c0 { | |
| brcm,pins = <0x00 0x01>; | |
| brcm,function = <0x04>; | |
| brcm,pull = <0x02>; | |
| - phandle = <0x9b>; | |
| + phandle = <0x9f>; | |
| }; | |
| i2c1 { | |
| @@ -1010,28 +1013,28 @@ | |
| brcm,pins = <0x04 0x05>; | |
| brcm,function = <0x02>; | |
| brcm,pull = <0x02>; | |
| - phandle = <0x9c>; | |
| + phandle = <0xa0>; | |
| }; | |
| i2c4 { | |
| brcm,pins = <0x08 0x09>; | |
| brcm,function = <0x02>; | |
| brcm,pull = <0x02>; | |
| - phandle = <0x9d>; | |
| + phandle = <0xa1>; | |
| }; | |
| i2c5 { | |
| brcm,pins = <0x0c 0x0d>; | |
| brcm,function = <0x02>; | |
| brcm,pull = <0x02>; | |
| - phandle = <0x9e>; | |
| + phandle = <0xa2>; | |
| }; | |
| i2c6 { | |
| brcm,pins = <0x16 0x17>; | |
| brcm,function = <0x02>; | |
| brcm,pull = <0x02>; | |
| - phandle = <0x9f>; | |
| + phandle = <0xa3>; | |
| }; | |
| i2s { | |
| @@ -1044,7 +1047,7 @@ | |
| brcm,pins = <0x22 0x23 0x24 0x25 0x26 0x27>; | |
| brcm,function = <0x07>; | |
| brcm,pull = <0x00 0x02 0x02 0x02 0x02 0x02>; | |
| - phandle = <0x1f>; | |
| + phandle = <0x25>; | |
| }; | |
| bt_pins { | |
| @@ -1072,34 +1075,34 @@ | |
| brcm,pins = <0x00 0x01>; | |
| brcm,function = <0x03>; | |
| brcm,pull = <0x00 0x02>; | |
| - phandle = <0xa0>; | |
| + phandle = <0xa4>; | |
| }; | |
| uart3_pins { | |
| brcm,pins = <0x04 0x05>; | |
| brcm,function = <0x03>; | |
| brcm,pull = <0x00 0x02>; | |
| - phandle = <0xa1>; | |
| + phandle = <0xa5>; | |
| }; | |
| uart4_pins { | |
| brcm,pins = <0x08 0x09>; | |
| brcm,function = <0x03>; | |
| brcm,pull = <0x00 0x02>; | |
| - phandle = <0xa2>; | |
| + phandle = <0xa6>; | |
| }; | |
| uart5_pins { | |
| brcm,pins = <0x0c 0x0d>; | |
| brcm,function = <0x03>; | |
| brcm,pull = <0x00 0x02>; | |
| - phandle = <0xa3>; | |
| + phandle = <0xa7>; | |
| }; | |
| audio_pins { | |
| brcm,pins = <0x28 0x29>; | |
| brcm,function = <0x04>; | |
| - phandle = <0x1d>; | |
| + phandle = <0x23>; | |
| }; | |
| }; | |
| @@ -1116,14 +1119,14 @@ | |
| status = "okay"; | |
| cts-event-workaround; | |
| skip-init; | |
| - phandle = <0x2d>; | |
| + phandle = <0x30>; | |
| bluetooth { | |
| compatible = "brcm,bcm43438-bt"; | |
| max-speed = <0x2dc6c0>; | |
| shutdown-gpios = <0x0a 0x00 0x00>; | |
| status = "disabled"; | |
| - phandle = <0x2c>; | |
| + phandle = <0x2f>; | |
| }; | |
| }; | |
| @@ -1138,7 +1141,7 @@ | |
| bus-width = <0x04>; | |
| brcm,overclock-50 = <0x00>; | |
| brcm,pio-limit = <0x01>; | |
| - phandle = <0x36>; | |
| + phandle = <0x39>; | |
| }; | |
| i2s@7e203000 { | |
| @@ -1151,7 +1154,7 @@ | |
| dma-names = "tx\0rx"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x0c>; | |
| - phandle = <0x2f>; | |
| + phandle = <0x32>; | |
| }; | |
| spi@7e204000 { | |
| @@ -1167,7 +1170,7 @@ | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x0d 0x0e>; | |
| cs-gpios = <0x0f 0x08 0x01 0x0f 0x07 0x01>; | |
| - phandle = <0x30>; | |
| + phandle = <0x33>; | |
| spidev@0 { | |
| compatible = "spidev"; | |
| @@ -1175,7 +1178,7 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| spi-max-frequency = <0x7735940>; | |
| - phandle = <0xa4>; | |
| + phandle = <0xa8>; | |
| }; | |
| spidev@1 { | |
| @@ -1184,7 +1187,7 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| spi-max-frequency = <0x7735940>; | |
| - phandle = <0xa5>; | |
| + phandle = <0xa9>; | |
| }; | |
| }; | |
| @@ -1209,20 +1212,20 @@ | |
| status = "disabled"; | |
| pinctrl-0 = <0x11>; | |
| pinctrl-1 = <0x12>; | |
| - phandle = <0x31>; | |
| + phandle = <0x34>; | |
| i2c@0 { | |
| reg = <0x00>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| - phandle = <0xa6>; | |
| + phandle = <0xaa>; | |
| }; | |
| i2c@1 { | |
| reg = <0x01>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| - phandle = <0xa7>; | |
| + phandle = <0xab>; | |
| }; | |
| }; | |
| @@ -1234,7 +1237,7 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| status = "disabled"; | |
| - phandle = <0xa8>; | |
| + phandle = <0xac>; | |
| }; | |
| dsi@7e209000 { | |
| @@ -1269,14 +1272,14 @@ | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x15>; | |
| skip-init; | |
| - phandle = <0x2e>; | |
| + phandle = <0x31>; | |
| bluetooth { | |
| compatible = "brcm,bcm43438-bt"; | |
| max-speed = <0x70800>; | |
| shutdown-gpios = <0x0a 0x00 0x00>; | |
| status = "disabled"; | |
| - phandle = <0xa9>; | |
| + phandle = <0xad>; | |
| }; | |
| }; | |
| @@ -1288,7 +1291,7 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| status = "disabled"; | |
| - phandle = <0xaa>; | |
| + phandle = <0xae>; | |
| }; | |
| spi@7e2150c0 { | |
| @@ -1299,7 +1302,7 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| status = "disabled"; | |
| - phandle = <0xab>; | |
| + phandle = <0xaf>; | |
| }; | |
| pwm@7e20c000 { | |
| @@ -1310,20 +1313,20 @@ | |
| assigned-clock-rates = <0x989680>; | |
| #pwm-cells = <0x02>; | |
| status = "disabled"; | |
| - phandle = <0xac>; | |
| + phandle = <0xb0>; | |
| }; | |
| hvs@7e400000 { | |
| - compatible = "brcm,bcm2835-hvs"; | |
| + compatible = "brcm,bcm2711-hvs"; | |
| reg = <0x7e400000 0x6000>; | |
| interrupts = <0x00 0x61 0x04>; | |
| - status = "disabled"; | |
| clocks = <0x16 0x04>; | |
| - phandle = <0xad>; | |
| + status = "disabled"; | |
| + phandle = <0xb1>; | |
| }; | |
| dsi@7e700000 { | |
| - compatible = "brcm,bcm2835-dsi1"; | |
| + compatible = "brcm,bcm2711-dsi1"; | |
| reg = <0x7e700000 0x8c>; | |
| interrupts = <0x00 0x6c 0x04>; | |
| #address-cells = <0x01>; | |
| @@ -1348,7 +1351,7 @@ | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x17>; | |
| clock-frequency = <0x186a0>; | |
| - phandle = <0x32>; | |
| + phandle = <0x35>; | |
| }; | |
| vec@7e806000 { | |
| @@ -1358,7 +1361,7 @@ | |
| interrupts = <0x00 0x7b 0x04>; | |
| status = "disabled"; | |
| power-domains = <0x13 0x07>; | |
| - phandle = <0xae>; | |
| + phandle = <0xb2>; | |
| }; | |
| usb@7e980000 { | |
| @@ -1374,13 +1377,13 @@ | |
| power-domains = <0x13 0x06>; | |
| interrupt-names = "usb\0soft"; | |
| status = "disabled"; | |
| - phandle = <0xaf>; | |
| + phandle = <0xb3>; | |
| }; | |
| local_intc@40000000 { | |
| compatible = "brcm,bcm2836-l1-intc"; | |
| reg = <0x40000000 0x100>; | |
| - phandle = <0xb0>; | |
| + phandle = <0xb4>; | |
| }; | |
| interrupt-controller@40041000 { | |
| @@ -1395,7 +1398,7 @@ | |
| avs-monitor@7d5d2000 { | |
| compatible = "brcm,bcm2711-avs-monitor\0syscon\0simple-mfd"; | |
| reg = <0x7d5d2000 0xf00>; | |
| - phandle = <0xb1>; | |
| + phandle = <0xb5>; | |
| thermal { | |
| compatible = "brcm,bcm2711-thermal"; | |
| @@ -1422,7 +1425,14 @@ | |
| clocks = <0x07 0x15 0x07 0x1d 0x07 0x17 0x07 0x16>; | |
| clock-names = "v3d\0peri_image\0h264\0isp"; | |
| system-power-controller; | |
| - phandle = <0x34>; | |
| + phandle = <0x37>; | |
| + }; | |
| + | |
| + rng@7e104000 { | |
| + compatible = "brcm,bcm2711-rng200"; | |
| + reg = <0x7e104000 0x28>; | |
| + status = "okay"; | |
| + phandle = <0x38>; | |
| }; | |
| serial@7e201400 { | |
| @@ -1433,7 +1443,7 @@ | |
| clock-names = "uartclk\0apb_pclk"; | |
| arm,primecell-periphid = <0x241011>; | |
| status = "disabled"; | |
| - phandle = <0xb2>; | |
| + phandle = <0xb6>; | |
| }; | |
| serial@7e201600 { | |
| @@ -1444,7 +1454,7 @@ | |
| clock-names = "uartclk\0apb_pclk"; | |
| arm,primecell-periphid = <0x241011>; | |
| status = "disabled"; | |
| - phandle = <0xb3>; | |
| + phandle = <0xb7>; | |
| }; | |
| serial@7e201800 { | |
| @@ -1455,7 +1465,7 @@ | |
| clock-names = "uartclk\0apb_pclk"; | |
| arm,primecell-periphid = <0x241011>; | |
| status = "disabled"; | |
| - phandle = <0xb4>; | |
| + phandle = <0xb8>; | |
| }; | |
| serial@7e201a00 { | |
| @@ -1466,7 +1476,7 @@ | |
| clock-names = "uartclk\0apb_pclk"; | |
| arm,primecell-periphid = <0x241011>; | |
| status = "disabled"; | |
| - phandle = <0xb5>; | |
| + phandle = <0xb9>; | |
| }; | |
| spi@7e204600 { | |
| @@ -1477,7 +1487,7 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| status = "disabled"; | |
| - phandle = <0xb6>; | |
| + phandle = <0xba>; | |
| }; | |
| spi@7e204800 { | |
| @@ -1488,7 +1498,7 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| status = "disabled"; | |
| - phandle = <0xb7>; | |
| + phandle = <0xbb>; | |
| }; | |
| spi@7e204a00 { | |
| @@ -1499,7 +1509,7 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| status = "disabled"; | |
| - phandle = <0xb8>; | |
| + phandle = <0xbc>; | |
| }; | |
| spi@7e204c00 { | |
| @@ -1510,7 +1520,7 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| status = "disabled"; | |
| - phandle = <0xb9>; | |
| + phandle = <0xbd>; | |
| }; | |
| i2c@7e205600 { | |
| @@ -1521,7 +1531,7 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| status = "disabled"; | |
| - phandle = <0xba>; | |
| + phandle = <0xbe>; | |
| }; | |
| i2c@7e205800 { | |
| @@ -1532,7 +1542,7 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| status = "disabled"; | |
| - phandle = <0xbb>; | |
| + phandle = <0xbf>; | |
| }; | |
| i2c@7e205a00 { | |
| @@ -1543,7 +1553,7 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| status = "disabled"; | |
| - phandle = <0xbc>; | |
| + phandle = <0xc0>; | |
| }; | |
| i2c@7e205c00 { | |
| @@ -1554,7 +1564,31 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| status = "disabled"; | |
| - phandle = <0xbd>; | |
| + phandle = <0xc1>; | |
| + }; | |
| + | |
| + pixelvalve@7e206000 { | |
| + compatible = "brcm,bcm2711-pixelvalve0"; | |
| + reg = <0x7e206000 0x100>; | |
| + interrupts = <0x00 0x6d 0x04>; | |
| + status = "disabled"; | |
| + phandle = <0xc2>; | |
| + }; | |
| + | |
| + pixelvalve@7e207000 { | |
| + compatible = "brcm,bcm2711-pixelvalve1"; | |
| + reg = <0x7e207000 0x100>; | |
| + interrupts = <0x00 0x6e 0x04>; | |
| + status = "disabled"; | |
| + phandle = <0xc3>; | |
| + }; | |
| + | |
| + pixelvalve@7e20a000 { | |
| + compatible = "brcm,bcm2711-pixelvalve2"; | |
| + reg = <0x7e20a000 0x100>; | |
| + interrupts = <0x00 0x65 0x04>; | |
| + status = "disabled"; | |
| + phandle = <0xc4>; | |
| }; | |
| pwm@7e20c800 { | |
| @@ -1567,12 +1601,102 @@ | |
| status = "disabled"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x1a 0x1b>; | |
| - phandle = <0xbe>; | |
| + phandle = <0xc5>; | |
| + }; | |
| + | |
| + pixelvalve@7e216000 { | |
| + compatible = "brcm,bcm2711-pixelvalve4"; | |
| + reg = <0x7e216000 0x100>; | |
| + interrupts = <0x00 0x6e 0x04>; | |
| + status = "disabled"; | |
| + phandle = <0xc6>; | |
| + }; | |
| + | |
| + pixelvalve@7ec12000 { | |
| + compatible = "brcm,bcm2711-pixelvalve3"; | |
| + reg = <0x7ec12000 0x100>; | |
| + interrupts = <0x00 0x6a 0x04>; | |
| + status = "disabled"; | |
| + phandle = <0xc7>; | |
| + }; | |
| + | |
| + clock@7ef00000 { | |
| + compatible = "brcm,brcm2711-dvp"; | |
| + reg = <0x7ef00000 0x10>; | |
| + clocks = <0x1c>; | |
| + #clock-cells = <0x01>; | |
| + #reset-cells = <0x01>; | |
| + status = "disabled"; | |
| + phandle = <0x1d>; | |
| + }; | |
| + | |
| + interrupt-controller@7ef00100 { | |
| + compatible = "brcm,bcm2711-l2-intc\0brcm,l2-intc"; | |
| + reg = <0x7ef00100 0x30>; | |
| + interrupts = <0x00 0x60 0x04>; | |
| + interrupt-controller; | |
| + #interrupt-cells = <0x01>; | |
| + status = "disabled"; | |
| + phandle = <0x1f>; | |
| + }; | |
| + | |
| + hdmi@7ef00700 { | |
| + compatible = "brcm,bcm2711-hdmi0"; | |
| + reg = <0x7ef00700 0x300 0x7ef00300 0x200 0x7ef00f00 0x80 0x7ef00f80 0x80 0x7ef01b00 0x200 0x7ef01f00 0x400 0x7ef00200 0x80 0x7ef04300 0x100 0x7ef20000 0x100 0x7ef00100 0x30>; | |
| + reg-names = "hdmi\0dvp\0phy\0rm\0packet\0metadata\0csc\0cec\0hd\0intr2"; | |
| + clocks = <0x16 0x0d 0x16 0x0e 0x1d 0x00 0x1e>; | |
| + clock-names = "hdmi\0bvb\0audio\0cec"; | |
| + resets = <0x1d 0x00>; | |
| + interrupt-parent = <0x1f>; | |
| + interrupts = <0x00 0x01 0x02 0x03 0x04 0x05>; | |
| + interrupt-names = "cec-tx\0cec-rx\0cec-low\0wakeup\0hpd-connected\0hpd-removed"; | |
| + ddc = <0x20>; | |
| + dmas = <0x0b 0x9f0000a>; | |
| + dma-names = "audio-rx"; | |
| + status = "disabled"; | |
| + phandle = <0xc8>; | |
| + }; | |
| + | |
| + i2c@7ef04500 { | |
| + compatible = "brcm,bcm2711-hdmi-i2c"; | |
| + reg = <0x7ef04500 0x100 0x7ef00b00 0x300>; | |
| + reg-names = "bsc\0auto-i2c"; | |
| + clock-frequency = <0x17cdc>; | |
| + status = "disabled"; | |
| + phandle = <0x20>; | |
| + }; | |
| + | |
| + hdmi@7ef05700 { | |
| + compatible = "brcm,bcm2711-hdmi1"; | |
| + reg = <0x7ef05700 0x300 0x7ef05300 0x200 0x7ef05f00 0x80 0x7ef05f80 0x80 0x7ef06b00 0x200 0x7ef06f00 0x400 0x7ef00280 0x80 0x7ef09300 0x100 0x7ef20000 0x100 0x7ef00100 0x30>; | |
| + reg-names = "hdmi\0dvp\0phy\0rm\0packet\0metadata\0csc\0cec\0hd\0intr2"; | |
| + ddc = <0x21>; | |
| + clock-names = "hdmi\0bvb\0audio\0cec"; | |
| + clocks = <0x16 0x0d 0x16 0x0e 0x1d 0x01 0x1e>; | |
| + resets = <0x1d 0x01>; | |
| + interrupt-parent = <0x1f>; | |
| + interrupts = <0x08 0x07 0x06 0x09 0x0a 0x0b>; | |
| + interrupt-names = "cec-tx\0cec-rx\0cec-low\0wakeup\0hpd-connected\0hpd-removed"; | |
| + dmas = <0x0b 0x9f00011>; | |
| + dma-names = "audio-rx"; | |
| + status = "disabled"; | |
| + phandle = <0xc9>; | |
| + }; | |
| + | |
| + i2c@7ef09500 { | |
| + compatible = "brcm,bcm2711-hdmi-i2c"; | |
| + reg = <0x7ef09500 0x100 0x7ef05b00 0x300>; | |
| + reg-names = "bsc\0auto-i2c"; | |
| + clock-frequency = <0x17cdc>; | |
| + status = "disabled"; | |
| + phandle = <0x21>; | |
| }; | |
| firmware { | |
| - compatible = "raspberrypi,bcm2835-firmware\0simple-bus"; | |
| - mboxes = <0x1c>; | |
| + compatible = "raspberrypi,bcm2835-firmware\0simple-mfd"; | |
| + #address-cells = <0x01>; | |
| + #size-cells = <0x01>; | |
| + mboxes = <0x22>; | |
| dma-ranges; | |
| phandle = <0x06>; | |
| @@ -1590,6 +1714,12 @@ | |
| status = "okay"; | |
| phandle = <0x0a>; | |
| }; | |
| + | |
| + reset { | |
| + compatible = "raspberrypi,firmware-reset"; | |
| + #reset-cells = <0x01>; | |
| + phandle = <0x2d>; | |
| + }; | |
| }; | |
| power { | |
| @@ -1603,34 +1733,18 @@ | |
| compatible = "brcm,bcm2711-vchiq"; | |
| reg = <0x7e00b840 0x3c>; | |
| interrupts = <0x00 0x22 0x04>; | |
| - phandle = <0xbf>; | |
| + phandle = <0xca>; | |
| bcm2835_audio { | |
| compatible = "brcm,bcm2835-audio"; | |
| brcm,pwm-channels = <0x08>; | |
| status = "disabled"; | |
| pinctrl-names = "default"; | |
| - pinctrl-0 = <0x1d>; | |
| - phandle = <0x33>; | |
| + pinctrl-0 = <0x23>; | |
| + phandle = <0x36>; | |
| }; | |
| }; | |
| - pixelvalve@7e206000 { | |
| - status = "disabled"; | |
| - compatible = "brcm,bcm2711-pixelvalve0"; | |
| - reg = <0x7e206000 0x100>; | |
| - interrupts = <0x00 0x6d 0x04>; | |
| - phandle = <0xc0>; | |
| - }; | |
| - | |
| - pixelvalve@7e207000 { | |
| - status = "disabled"; | |
| - compatible = "brcm,bcm2711-pixelvalve1"; | |
| - reg = <0x7e207000 0x100>; | |
| - interrupts = <0x00 0x6e 0x04>; | |
| - phandle = <0xc1>; | |
| - }; | |
| - | |
| mmc@7e300000 { | |
| compatible = "brcm,bcm2835-mmc\0brcm,bcm2835-sdhci"; | |
| reg = <0x7e300000 0x100>; | |
| @@ -1641,9 +1755,9 @@ | |
| brcm,overclock-50 = <0x00>; | |
| status = "disabled"; | |
| pinctrl-names = "default"; | |
| - pinctrl-0 = <0x1e>; | |
| + pinctrl-0 = <0x24>; | |
| bus-width = <0x04>; | |
| - phandle = <0x37>; | |
| + phandle = <0x3a>; | |
| }; | |
| mmcnr@7e300000 { | |
| @@ -1657,9 +1771,9 @@ | |
| non-removable; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| - pinctrl-0 = <0x1f>; | |
| + pinctrl-0 = <0x25>; | |
| bus-width = <0x04>; | |
| - phandle = <0x38>; | |
| + phandle = <0x3b>; | |
| }; | |
| firmwarekms@7e600000 { | |
| @@ -1668,7 +1782,7 @@ | |
| interrupts = <0x00 0x70 0x04>; | |
| brcm,firmware = <0x06>; | |
| status = "disabled"; | |
| - phandle = <0xc2>; | |
| + phandle = <0xcb>; | |
| }; | |
| smi@7e600000 { | |
| @@ -1681,7 +1795,7 @@ | |
| dmas = <0x0b 0x04>; | |
| dma-names = "rx-tx"; | |
| status = "disabled"; | |
| - phandle = <0xc3>; | |
| + phandle = <0xcc>; | |
| }; | |
| csi@7e800000 { | |
| @@ -1695,7 +1809,7 @@ | |
| #size-cells = <0x00>; | |
| #clock-cells = <0x01>; | |
| status = "disabled"; | |
| - phandle = <0xc4>; | |
| + phandle = <0xcd>; | |
| }; | |
| csi@7e801000 { | |
| @@ -1710,7 +1824,7 @@ | |
| #clock-cells = <0x01>; | |
| status = "disabled"; | |
| brcm,num-data-lanes = <0x02>; | |
| - phandle = <0xc5>; | |
| + phandle = <0xce>; | |
| }; | |
| axiperf { | |
| @@ -1718,7 +1832,7 @@ | |
| reg = <0x7e009800 0x100 0x7ee08000 0x100>; | |
| firmware = <0x06>; | |
| status = "disabled"; | |
| - phandle = <0x39>; | |
| + phandle = <0x3c>; | |
| }; | |
| gpiomem { | |
| @@ -1730,101 +1844,19 @@ | |
| compatible = "brcm,bcm2708-fb"; | |
| firmware = <0x06>; | |
| status = "okay"; | |
| - phandle = <0xc6>; | |
| + phandle = <0xcf>; | |
| }; | |
| vcsm { | |
| compatible = "raspberrypi,bcm2835-vcsm"; | |
| firmware = <0x06>; | |
| status = "okay"; | |
| - phandle = <0xc7>; | |
| + phandle = <0xd0>; | |
| }; | |
| sound { | |
| status = "disabled"; | |
| - phandle = <0xc8>; | |
| - }; | |
| - | |
| - pixelvalve@7e20a000 { | |
| - compatible = "brcm,bcm2711-pixelvalve2"; | |
| - reg = <0x7e20a000 0x100>; | |
| - interrupts = <0x00 0x65 0x04>; | |
| - status = "disabled"; | |
| - phandle = <0xc9>; | |
| - }; | |
| - | |
| - pixelvalve@7e216000 { | |
| - compatible = "brcm,bcm2711-pixelvalve4"; | |
| - reg = <0x7e216000 0x100>; | |
| - interrupts = <0x00 0x6e 0x04>; | |
| - status = "disabled"; | |
| - phandle = <0xca>; | |
| - }; | |
| - | |
| - pixelvalve@7ec12000 { | |
| - compatible = "brcm,bcm2711-pixelvalve3"; | |
| - reg = <0x7ec12000 0x100>; | |
| - interrupts = <0x00 0x6a 0x04>; | |
| - status = "disabled"; | |
| - phandle = <0xcb>; | |
| - }; | |
| - | |
| - clock@7ef00000 { | |
| - compatible = "brcm,brcm2711-dvp"; | |
| - reg = <0x7ef00000 0x10>; | |
| - clocks = <0x20>; | |
| - #clock-cells = <0x01>; | |
| - #reset-cells = <0x01>; | |
| - status = "disabled"; | |
| - phandle = <0x21>; | |
| - }; | |
| - | |
| - hdmi@7ef00700 { | |
| - compatible = "brcm,bcm2711-hdmi0"; | |
| - reg = <0x7ef00700 0x300 0x7ef00300 0x200 0x7ef00f00 0x80 0x7ef00f80 0x80 0x7ef01b00 0x200 0x7ef01f00 0x400 0x7ef00200 0x80 0x7ef04300 0x100 0x7ef20000 0x100 0x7ef00100 0x30>; | |
| - reg-names = "hdmi\0dvp\0phy\0rm\0packet\0metadata\0csc\0cec\0hd\0intr2"; | |
| - clocks = <0x16 0x0d>; | |
| - clock-names = "hdmi"; | |
| - resets = <0x21 0x00>; | |
| - ddc = <0x22>; | |
| - dmas = <0x0b 0x800000a>; | |
| - dma-names = "audio-rx"; | |
| - interrupts = <0x00 0x60 0x04>; | |
| - status = "disabled"; | |
| - phandle = <0xcc>; | |
| - }; | |
| - | |
| - i2c@7ef04500 { | |
| - compatible = "brcm,bcm2711-hdmi-i2c"; | |
| - reg = <0x7ef04500 0x100 0x7ef00b00 0x300>; | |
| - reg-names = "bsc\0auto-i2c"; | |
| - clock-frequency = <0x17cdc>; | |
| - status = "disabled"; | |
| - phandle = <0x22>; | |
| - }; | |
| - | |
| - hdmi@7ef05700 { | |
| - compatible = "brcm,bcm2711-hdmi1"; | |
| - reg = <0x7ef05700 0x300 0x7ef05300 0x200 0x7ef05f00 0x80 0x7ef05f80 0x80 0x7ef06b00 0x200 0x7ef06f00 0x400 0x7ef00280 0x80 0x7ef09300 0x100 0x7ef20000 0x100 0x7ef00100 0x30>; | |
| - reg-names = "hdmi\0dvp\0phy\0rm\0packet\0metadata\0csc\0cec\0hd\0intr2"; | |
| - ddc = <0x23>; | |
| - clocks = <0x16 0x0d>; | |
| - clock-names = "hdmi"; | |
| - resets = <0x21 0x01>; | |
| - dmas = <0x0b 0x8000011>; | |
| - dma-names = "audio-rx"; | |
| - interrupts = <0x00 0x60 0x04>; | |
| - status = "disabled"; | |
| - phandle = <0xcd>; | |
| - }; | |
| - | |
| - i2c@7ef09500 { | |
| - compatible = "brcm,bcm2711-hdmi-i2c"; | |
| - reg = <0x7ef09500 0x100 0x7ef05b00 0x300>; | |
| - reg-names = "bsc\0auto-i2c"; | |
| - clock-frequency = <0x17cdc>; | |
| - status = "disabled"; | |
| - phandle = <0x23>; | |
| + phandle = <0xd1>; | |
| }; | |
| }; | |
| @@ -1853,13 +1885,35 @@ | |
| phandle = <0x19>; | |
| }; | |
| + gpu { | |
| + compatible = "brcm,bcm2711-vc5"; | |
| + status = "disabled"; | |
| + phandle = <0xd2>; | |
| + }; | |
| + | |
| + clk-27M { | |
| + #clock-cells = <0x00>; | |
| + compatible = "fixed-clock"; | |
| + clock-frequency = <0x19bfcc0>; | |
| + clock-output-names = "27MHz-clock"; | |
| + phandle = <0x1e>; | |
| + }; | |
| + | |
| + clk-108M { | |
| + #clock-cells = <0x00>; | |
| + compatible = "fixed-clock"; | |
| + clock-frequency = <0x66ff300>; | |
| + clock-output-names = "108MHz-clock"; | |
| + phandle = <0x1c>; | |
| + }; | |
| + | |
| emmc2bus { | |
| compatible = "simple-bus"; | |
| #address-cells = <0x02>; | |
| #size-cells = <0x01>; | |
| ranges = <0x00 0x7e000000 0x00 0xfe000000 0x1800000>; | |
| dma-ranges = <0x00 0xc0000000 0x00 0x00 0x40000000>; | |
| - phandle = <0xce>; | |
| + phandle = <0xd3>; | |
| emmc2@7e340000 { | |
| compatible = "brcm,bcm2711-emmc2"; | |
| @@ -1867,18 +1921,18 @@ | |
| interrupts = <0x00 0x7e 0x04>; | |
| clocks = <0x07 0x33>; | |
| status = "okay"; | |
| - vqmmc-supply = <0x24>; | |
| + vqmmc-supply = <0x26>; | |
| + vmmc-supply = <0x27>; | |
| broken-cd; | |
| mmc-ddr-3_3v; | |
| - vmmc-supply = <0x25>; | |
| - phandle = <0x3a>; | |
| + phandle = <0x3f>; | |
| }; | |
| }; | |
| arm-pmu { | |
| - compatible = "arm,cortex-a72-pmu\0arm,cortex-a15-pmu"; | |
| + compatible = "arm,cortex-a72-pmu\0arm,armv8-pmuv3"; | |
| interrupts = <0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x12 0x04 0x00 0x13 0x04>; | |
| - interrupt-affinity = <0x26 0x27 0x28 0x29>; | |
| + interrupt-affinity = <0x28 0x29 0x2a 0x2b>; | |
| }; | |
| timer { | |
| @@ -1891,7 +1945,7 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| enable-method = "brcm,bcm2836-smp"; | |
| - phandle = <0xcf>; | |
| + phandle = <0xd4>; | |
| cpu@0 { | |
| device_type = "cpu"; | |
| @@ -1899,7 +1953,7 @@ | |
| reg = <0x00>; | |
| enable-method = "spin-table"; | |
| cpu-release-addr = <0x00 0xd8>; | |
| - phandle = <0x26>; | |
| + phandle = <0x28>; | |
| }; | |
| cpu@1 { | |
| @@ -1908,7 +1962,7 @@ | |
| reg = <0x01>; | |
| enable-method = "spin-table"; | |
| cpu-release-addr = <0x00 0xe0>; | |
| - phandle = <0x27>; | |
| + phandle = <0x29>; | |
| }; | |
| cpu@2 { | |
| @@ -1917,7 +1971,7 @@ | |
| reg = <0x02>; | |
| enable-method = "spin-table"; | |
| cpu-release-addr = <0x00 0xe8>; | |
| - phandle = <0x28>; | |
| + phandle = <0x2a>; | |
| }; | |
| cpu@3 { | |
| @@ -1926,7 +1980,7 @@ | |
| reg = <0x03>; | |
| enable-method = "spin-table"; | |
| cpu-release-addr = <0x00 0xf0>; | |
| - phandle = <0x29>; | |
| + phandle = <0x2b>; | |
| }; | |
| }; | |
| @@ -1936,7 +1990,7 @@ | |
| #size-cells = <0x02>; | |
| ranges = <0x00 0x7c000000 0x00 0xfc000000 0x00 0x3800000 0x00 0x40000000 0x00 0xff800000 0x00 0x800000 0x06 0x00 0x06 0x00 0x00 0x40000000 0x00 0x00 0x00 0x00 0x00 0xfc000000>; | |
| dma-ranges = <0x00 0x00 0x00 0x00 0x04 0x00>; | |
| - phandle = <0xd0>; | |
| + phandle = <0xd5>; | |
| pcie@7d500000 { | |
| compatible = "brcm,bcm2711-pcie"; | |
| @@ -1950,23 +2004,35 @@ | |
| interrupt-map-mask = <0x00 0x00 0x00 0x07>; | |
| interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x8f 0x04>; | |
| msi-controller; | |
| - msi-parent = <0x2a>; | |
| - ranges = <0x2000000 0x00 0xf8000000 0x06 0x00 0x00 0x4000000>; | |
| + msi-parent = <0x2c>; | |
| + ranges = <0x2000000 0x00 0xc0000000 0x06 0x00 0x00 0x40000000>; | |
| dma-ranges = <0x2000000 0x00 0x00 0x00 0x00 0x00 0xc0000000>; | |
| brcm,enable-ssc; | |
| - phandle = <0x2a>; | |
| + phandle = <0x2c>; | |
| + | |
| + pci@1,0 { | |
| + #address-cells = <0x03>; | |
| + #size-cells = <0x02>; | |
| + ranges; | |
| + reg = <0x00 0x00 0x00 0x00 0x00>; | |
| + | |
| + usb@1,0 { | |
| + reg = <0x10000 0x00 0x00 0x00 0x00>; | |
| + resets = <0x2d 0x00>; | |
| + }; | |
| + }; | |
| }; | |
| ethernet@7d580000 { | |
| - compatible = "brcm,bcm2711-genet-v5\0brcm,genet-v5"; | |
| + compatible = "brcm,bcm2711-genet-v5"; | |
| reg = <0x00 0x7d580000 0x00 0x10000>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| interrupts = <0x00 0x9d 0x04 0x00 0x9e 0x04>; | |
| status = "okay"; | |
| - phy-handle = <0x2b>; | |
| + phy-handle = <0x2e>; | |
| phy-mode = "rgmii-rxid"; | |
| - phandle = <0xd1>; | |
| + phandle = <0xd6>; | |
| mdio@e14 { | |
| compatible = "brcm,genet-mdio-v5"; | |
| @@ -1974,12 +2040,12 @@ | |
| reg-names = "mdio"; | |
| #address-cells = <0x00>; | |
| #size-cells = <0x01>; | |
| - phandle = <0xd2>; | |
| + phandle = <0xd7>; | |
| ethernet-phy@1 { | |
| reg = <0x01>; | |
| led-modes = <0x00 0x08>; | |
| - phandle = <0x2b>; | |
| + phandle = <0x2e>; | |
| }; | |
| }; | |
| }; | |
| @@ -1991,7 +2057,7 @@ | |
| interrupt-names = "dma11\0dma12\0dma13\0dma14"; | |
| #dma-cells = <0x01>; | |
| brcm,dma-channel-mask = <0x7000>; | |
| - phandle = <0x3d>; | |
| + phandle = <0x40>; | |
| }; | |
| xhci@7e9c0000 { | |
| @@ -2000,7 +2066,7 @@ | |
| reg = <0x00 0x7e9c0000 0x00 0x100000>; | |
| interrupts = <0x00 0xb0 0x04>; | |
| power-domains = <0x13 0x06>; | |
| - phandle = <0xd3>; | |
| + phandle = <0xd8>; | |
| }; | |
| hevc-decoder@7eb00000 { | |
| @@ -2031,14 +2097,14 @@ | |
| leds { | |
| compatible = "gpio-leds"; | |
| - phandle = <0xd4>; | |
| + phandle = <0xd9>; | |
| act { | |
| label = "led0"; | |
| default-state = "keep"; | |
| linux,default-trigger = "mmc0"; | |
| gpios = <0x0f 0x2a 0x00>; | |
| - phandle = <0x3b>; | |
| + phandle = <0x3d>; | |
| }; | |
| pwr { | |
| @@ -2046,7 +2112,7 @@ | |
| gpios = <0x0a 0x02 0x01>; | |
| default-state = "keep"; | |
| linux,default-trigger = "default-on"; | |
| - phandle = <0x3c>; | |
| + phandle = <0x3e>; | |
| }; | |
| }; | |
| @@ -2066,7 +2132,18 @@ | |
| gpios = <0x0a 0x04 0x00>; | |
| states = <0x1b7740 0x01 0x325aa0 0x00>; | |
| status = "okay"; | |
| - phandle = <0x24>; | |
| + phandle = <0x26>; | |
| + }; | |
| + | |
| + sd_vcc_reg { | |
| + compatible = "regulator-fixed"; | |
| + regulator-name = "vcc-sd"; | |
| + regulator-min-microvolt = <0x325aa0>; | |
| + regulator-max-microvolt = <0x325aa0>; | |
| + regulator-boot-on; | |
| + enable-active-high; | |
| + gpio = <0x0a 0x06 0x00>; | |
| + phandle = <0x27>; | |
| }; | |
| __overrides__ { | |
| @@ -2074,37 +2151,37 @@ | |
| cam0-pwdn; | |
| cam0-led-ctrl; | |
| cam0-led; | |
| - krnbt = "\0\0\0,status"; | |
| - krnbt_baudrate = "\0\0\0,max-speed:0"; | |
| + krnbt = "\0\0\0/status"; | |
| + krnbt_baudrate = "\0\0\0/max-speed:0"; | |
| cache_line_size; | |
| - uart0 = "\0\0\0-status"; | |
| - uart1 = "\0\0\0.status"; | |
| - i2s = "\0\0\0/status"; | |
| - spi = "\0\0\00status"; | |
| - i2c0 = [00 00 00 10 73 74 61 74 75 73 00 00 00 00 31 73 74 61 74 75 73 00]; | |
| - i2c1 = "\0\0\02status"; | |
| + uart0 = "\0\0\00status"; | |
| + uart1 = "\0\0\01status"; | |
| + i2s = "\0\0\02status"; | |
| + spi = "\0\0\03status"; | |
| + i2c0 = [00 00 00 10 73 74 61 74 75 73 00 00 00 00 34 73 74 61 74 75 73 00]; | |
| + i2c1 = "\0\0\05status"; | |
| i2c0_baudrate = [00 00 00 10 63 6c 6f 63 6b 2d 66 72 65 71 75 65 6e 63 79 3a 30 00]; | |
| - i2c1_baudrate = "\0\0\02clock-frequency:0"; | |
| - audio = "\0\0\03status"; | |
| - watchdog = "\0\0\04status"; | |
| - random = "\0\0\05status"; | |
| - sd_overclock = "\0\0\06brcm,overclock-50:0"; | |
| - sd_force_pio = "\0\0\06brcm,force-pio?"; | |
| - sd_pio_limit = "\0\0\06brcm,pio-limit:0"; | |
| - sd_debug = "\0\0\06brcm,debug"; | |
| - sdio_overclock = "\0\0\07brcm,overclock-50:0\0\0\0\08brcm,overclock-50:0"; | |
| - axiperf = "\0\0\09status"; | |
| + i2c1_baudrate = "\0\0\05clock-frequency:0"; | |
| + audio = "\0\0\06status"; | |
| + watchdog = "\0\0\07status"; | |
| + random = "\0\0\08status"; | |
| + sd_overclock = "\0\0\09brcm,overclock-50:0"; | |
| + sd_force_pio = "\0\0\09brcm,force-pio?"; | |
| + sd_pio_limit = "\0\0\09brcm,pio-limit:0"; | |
| + sd_debug = "\0\0\09brcm,debug"; | |
| + sdio_overclock = "\0\0\0:brcm,overclock-50:0\0\0\0\0;brcm,overclock-50:0"; | |
| + axiperf = "\0\0\0<status"; | |
| arm_freq; | |
| - sd_poll_once = "\0\0\0:non-removable?"; | |
| - act_led_gpio = "\0\0\0;gpios:4"; | |
| - act_led_activelow = "\0\0\0;gpios:8"; | |
| - act_led_trigger = "\0\0\0;linux,default-trigger"; | |
| - pwr_led_gpio = "\0\0\0<gpios:4"; | |
| - pwr_led_activelow = "\0\0\0<gpios:8"; | |
| - pwr_led_trigger = "\0\0\0<linux,default-trigger"; | |
| - eth_led0 = "\0\0\0+led-modes:0"; | |
| - eth_led1 = "\0\0\0+led-modes:4"; | |
| - spi_dma4 = <0x30 0x646d6173 0x3a303d00 0x3d 0x30 0x646d6173 0x3a383d00 0x3d>; | |
| + act_led_gpio = "\0\0\0=gpios:4"; | |
| + act_led_activelow = "\0\0\0=gpios:8"; | |
| + act_led_trigger = "\0\0\0=linux,default-trigger"; | |
| + pwr_led_gpio = "\0\0\0>gpios:4"; | |
| + pwr_led_activelow = "\0\0\0>gpios:8"; | |
| + pwr_led_trigger = "\0\0\0>linux,default-trigger"; | |
| + eth_led0 = "\0\0\0.led-modes:0"; | |
| + eth_led1 = "\0\0\0.led-modes:4"; | |
| + sd_poll_once = "\0\0\0?non-removable?"; | |
| + spi_dma4 = <0x33 0x646d6173 0x3a303d00 0x40 0x33 0x646d6173 0x3a383d00 0x40>; | |
| }; | |
| fixedregulator_3v3 { | |
| @@ -2113,7 +2190,7 @@ | |
| regulator-max-microvolt = <0x325aa0>; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-name = "3v3"; | |
| - phandle = <0xd5>; | |
| + phandle = <0xda>; | |
| }; | |
| fixedregulator_5v0 { | |
| @@ -2122,7 +2199,7 @@ | |
| regulator-max-microvolt = <0x4c4b40>; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-name = "5v0"; | |
| - phandle = <0xd6>; | |
| + phandle = <0xdb>; | |
| }; | |
| v3dbus { | |
| @@ -2131,56 +2208,40 @@ | |
| #size-cells = <0x02>; | |
| ranges = <0x7c500000 0x00 0xfc500000 0x00 0x3300000 0x40000000 0x00 0xff800000 0x00 0x800000>; | |
| dma-ranges = <0x00 0x00 0x00 0x04 0x00>; | |
| - phandle = <0xd7>; | |
| + phandle = <0xdc>; | |
| v3d@7ec04000 { | |
| compatible = "brcm,2711-v3d"; | |
| reg = <0x7ec00000 0x00 0x4000 0x7ec04000 0x00 0x4000>; | |
| reg-names = "hub\0core0"; | |
| - power-domains = <0x34 0x01>; | |
| - resets = <0x34 0x00>; | |
| + power-domains = <0x37 0x01>; | |
| + resets = <0x37 0x00>; | |
| clocks = <0x16 0x05>; | |
| clocks-names = "v3d"; | |
| interrupts = <0x00 0x4a 0x04>; | |
| status = "disabled"; | |
| - phandle = <0xd8>; | |
| + phandle = <0xdd>; | |
| }; | |
| }; | |
| - gpu { | |
| - compatible = "brcm,bcm2711-vc5"; | |
| - status = "disabled"; | |
| - phandle = <0xd9>; | |
| - }; | |
| - | |
| - clk-108M { | |
| - #clock-cells = <0x00>; | |
| - compatible = "fixed-clock"; | |
| - clock-frequency = <0x66ff300>; | |
| - clock-output-names = "108MHz-clock"; | |
| - phandle = <0x20>; | |
| - }; | |
| - | |
| - sd_vcc_reg { | |
| + cam1_reg { | |
| compatible = "regulator-fixed"; | |
| - regulator-name = "vcc-sd"; | |
| - regulator-min-microvolt = <0x325aa0>; | |
| - regulator-max-microvolt = <0x325aa0>; | |
| - regulator-boot-on; | |
| + regulator-name = "cam1-reg"; | |
| enable-active-high; | |
| - gpio = <0x0a 0x06 0x00>; | |
| - phandle = <0x25>; | |
| + status = "disabled"; | |
| + gpio = <0x0a 0x05 0x00>; | |
| + phandle = <0xde>; | |
| }; | |
| __symbols__ { | |
| rmem = "/reserved-memory"; | |
| cma = "/reserved-memory/linux,cma"; | |
| + blconfig = "/reserved-memory/nvram@0"; | |
| cpu_thermal = "/thermal-zones/cpu-thermal"; | |
| soc = "/soc"; | |
| system_timer = "/soc/timer@7e003000"; | |
| txp = "/soc/txp@7e004000"; | |
| clocks = "/soc/cprman@7e101000"; | |
| - random = "/soc/rng@7e104000"; | |
| mailbox = "/soc/mailbox@7e00b880"; | |
| gpio = "/soc/gpio@7e200000"; | |
| dpi_gpio0 = "/soc/gpio@7e200000/dpi_gpio0"; | |
| @@ -2325,6 +2386,7 @@ | |
| dma = "/soc/dma@7e007000"; | |
| watchdog = "/soc/watchdog@7e100000"; | |
| pm = "/soc/watchdog@7e100000"; | |
| + random = "/soc/rng@7e104000"; | |
| uart2 = "/soc/serial@7e201400"; | |
| uart3 = "/soc/serial@7e201600"; | |
| uart4 = "/soc/serial@7e201800"; | |
| @@ -2337,15 +2399,25 @@ | |
| i2c4 = "/soc/i2c@7e205800"; | |
| i2c5 = "/soc/i2c@7e205a00"; | |
| i2c6 = "/soc/i2c@7e205c00"; | |
| + pixelvalve0 = "/soc/pixelvalve@7e206000"; | |
| + pixelvalve1 = "/soc/pixelvalve@7e207000"; | |
| + pixelvalve2 = "/soc/pixelvalve@7e20a000"; | |
| pwm1 = "/soc/pwm@7e20c800"; | |
| + pixelvalve4 = "/soc/pixelvalve@7e216000"; | |
| + pixelvalve3 = "/soc/pixelvalve@7ec12000"; | |
| + dvp = "/soc/clock@7ef00000"; | |
| + aon_intr = "/soc/interrupt-controller@7ef00100"; | |
| + hdmi0 = "/soc/hdmi@7ef00700"; | |
| + ddc0 = "/soc/i2c@7ef04500"; | |
| + hdmi1 = "/soc/hdmi@7ef05700"; | |
| + ddc1 = "/soc/i2c@7ef09500"; | |
| firmware = "/soc/firmware"; | |
| firmware_clocks = "/soc/firmware/clocks"; | |
| expgpio = "/soc/firmware/gpio"; | |
| + reset = "/soc/firmware/reset"; | |
| power = "/soc/power"; | |
| vchiq = "/soc/mailbox@7e00b840"; | |
| audio = "/soc/mailbox@7e00b840/bcm2835_audio"; | |
| - pixelvalve0 = "/soc/pixelvalve@7e206000"; | |
| - pixelvalve1 = "/soc/pixelvalve@7e207000"; | |
| sdhci = "/soc/mmc@7e300000"; | |
| mmc = "/soc/mmc@7e300000"; | |
| mmcnr = "/soc/mmcnr@7e300000"; | |
| @@ -2357,17 +2429,12 @@ | |
| fb = "/soc/fb"; | |
| vcsm = "/soc/vcsm"; | |
| sound = "/soc/sound"; | |
| - pixelvalve2 = "/soc/pixelvalve@7e20a000"; | |
| - pixelvalve4 = "/soc/pixelvalve@7e216000"; | |
| - pixelvalve3 = "/soc/pixelvalve@7ec12000"; | |
| - dvp = "/soc/clock@7ef00000"; | |
| - hdmi0 = "/soc/hdmi@7ef00700"; | |
| - ddc0 = "/soc/i2c@7ef04500"; | |
| - hdmi1 = "/soc/hdmi@7ef05700"; | |
| - ddc1 = "/soc/i2c@7ef09500"; | |
| clk_osc = "/clocks/clk-osc"; | |
| clk_usb = "/clocks/clk-usb"; | |
| usbphy = "/phy"; | |
| + vc4 = "/gpu"; | |
| + clk_27MHz = "/clk-27M"; | |
| + clk_108MHz = "/clk-108M"; | |
| emmc2bus = "/emmc2bus"; | |
| emmc2 = "/emmc2bus/emmc2@7e340000"; | |
| cpus = "/cpus"; | |
| @@ -2386,12 +2453,11 @@ | |
| act_led = "/leds/act"; | |
| pwr_led = "/leds/pwr"; | |
| sd_io_1v8_reg = "/sd_io_1v8_reg"; | |
| + sd_vcc_reg = "/sd_vcc_reg"; | |
| vdd_3v3_reg = "/fixedregulator_3v3"; | |
| vdd_5v0_reg = "/fixedregulator_5v0"; | |
| v3dbus = "/v3dbus"; | |
| v3d = "/v3dbus/v3d@7ec04000"; | |
| - vc4 = "/gpu"; | |
| - clk_108MHz = "/clk-108M"; | |
| - sd_vcc_reg = "/sd_vcc_reg"; | |
| + cam1_reg = "/cam1_reg"; | |
| }; | |
| }; |
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